SD1433

The STMicroelectronics SD1433 is a silicon NPN RF power bipolar transistor intended primarily for Class C driver applications in UHF mobile-radio equipment. The device is specified around 470 MHz and is designed for operation over the 450–512 MHz frequency range. Its principal rated operating condition is 12.5 V collector-emitter supply, with a minimum RF output power of 10 W at 2.0 W input power and a specified power gain of at least 7 dB under the corresponding 470 MHz test condition. The device uses a common-emitter configuration and an emitter-ballasted transistor structure intended to provide stable power gain, high efficiency, and high load-mismatch tolerance. The published datasheet identifies the device as obsolete, so its specifications should be treated as the historical manufacturer specifications for the SD1433 rather than as an indication of current production availability.

## Device Structure and Intended Application

The SD1433 is an epitaxial silicon NPN planar bipolar transistor. Unlike a small-signal RF transistor, it is specifically constructed as an RF power device, with the emitter-ballasted geometry being an important part of its RF operating characteristics. The ballast structure is intended to improve current distribution and operating stability when the transistor is driven at significant RF power levels.

The datasheet classifies the SD1433 as a Class C device. Class C operation means that the transistor conducts for less than one-half of an RF cycle under the intended biasing conditions. Consequently, the transistor is optimized for high-efficiency RF power amplification rather than linear amplitude reproduction. This operating mode is particularly appropriate for constant-envelope or highly efficient RF transmitter architectures in which the output stage does not have to preserve arbitrary amplitude modulation.

The specified application range is 450–512 MHz, placing the device in the UHF mobile-radio frequency region. The principal characterization frequency is 470 MHz. The datasheet therefore should not be interpreted as specifying identical performance across the entire 450–512 MHz band; the guaranteed electrical performance values are explicitly associated with their stated test conditions, while the frequency-response information is provided separately through typical-performance curves.

## Electrical and RF Performance

The principal RF performance specification is a minimum output power of 10 W at 470 MHz with 2.0 W RF input power and a collector-emitter voltage of 12.5 V. Under these conditions, the device has a minimum specified power gain of 7 dB when producing 10 W output power.

The relationship between the stated input and output powers is consistent with the specified RF gain. An input power of 2.0 W corresponds to approximately 33 dBm, while 10 W corresponds to approximately 40 dBm. The difference is approximately 7 dB, matching the datasheet's minimum power-gain specification. This is an important distinction from small-signal transistor gain: the 7 dB value is specified at substantial RF output power and therefore represents power gain under a large-signal operating condition.

The datasheet also identifies 60% efficiency as a principal feature. Because the device is a Class C RF power transistor, this efficiency characteristic is directly related to its intended operating mode. The 60% figure should not be interpreted as a universal efficiency value across frequency, input power, load impedance, temperature, or bias conditions. The detailed typical-performance curves show how power gain and efficiency vary with input power, while the guaranteed tabulated RF parameters are tied to their explicit test conditions.

## DC Ratings and Breakdown Characteristics

The absolute maximum collector-base voltage, VCBO, is 36 V, while the collector-emitter voltage rating with the base open, VCEO, is 16 V. The collector-emitter voltage rating with the base shorted to the emitter, VCES, is 36 V. These three ratings describe different semiconductor terminal conditions and should not be treated as interchangeable voltage specifications.

The emitter-base voltage rating is 4.0 V. This is an important protection limit because the emitter-base junction of a bipolar transistor is comparatively sensitive to excessive reverse voltage. The 4.0 V value is therefore an absolute maximum rating rather than a recommended operating bias.

The maximum device collector current is specified as 2.5 A. The maximum power dissipation is 58 W at the stated reference condition. The maximum junction temperature is +200 °C, while the storage-temperature range is −65 to +150 °C. These values define semiconductor stress limits and thermal boundaries; they do not mean that the device should normally be operated continuously at the maximum current, maximum dissipation, and maximum junction temperature simultaneously.

The static breakdown specifications are consistent with the absolute ratings. BVCES is specified at a minimum of 36 V with IC = 25 mA and VBE = 0 V. BVCEO is a minimum of 16 V with IC = 20 mA and IB = 0 mA. BVEBO is a minimum of 4.0 V with IE = 10 mA and IC = 0 mA.

## Static Characteristics

The specified minimum DC current gain, hFE, is 10 under the condition VCE = 5 V and IC = 1 A. This value is relatively low compared with many small-signal bipolar transistors, but it is appropriate to evaluate it in the context of a high-frequency RF power transistor. The device is designed for RF power amplification, and the RF matching network and drive conditions are fundamental parts of its operation.

The datasheet specifies maximum collector-emitter leakage current ICES of 3 mA under VCE = 10 V with the emitter open. The maximum collector-base leakage current ICBO is 2 mA at VCB = 15 V with the emitter open. These leakage specifications characterize the transistor under defined DC test conditions and should not be substituted for RF operating current specifications.

The static parameters also illustrate why the SD1433 is not simply a general-purpose high-current NPN transistor. Its intended performance is determined by the interaction of transistor current, RF frequency, input matching, collector load impedance, biasing, and thermal conditions. The RF specifications therefore have greater significance for application design than hFE alone.

## RF Impedance and Matching Requirements

A particularly important part of the SD1433 datasheet is the impedance information provided for RF matching. At 470 MHz, the typical input impedance is specified as 1.5 − j2.7 Ω. The typical collector load impedance is specified as 5.7 + j1.5 Ω.

These impedances demonstrate that the transistor is not intended to be connected directly to a conventional 50 Ω RF source or load. Both the input and collector sides require impedance transformation and reactive compensation. The very low input impedance is characteristic of a high-power RF transistor operating at UHF frequencies and must be incorporated into the input matching network.

The input impedance contains a negative reactive component, while the collector load impedance contains a positive reactive component. Consequently, the matching networks must provide both impedance transformation and reactive cancellation. The exact matching implementation depends on PCB geometry, transmission-line configuration, component parasitics, supply decoupling, and the required operating bandwidth.

The datasheet specifies a collector-output capacitance, COB, of 19 pF typical at 1 MHz with VCB = 12.5 V. Although this capacitance is measured at a frequency substantially lower than the intended RF operating frequency, it is an important parameter for understanding the transistor's internal reactive behavior and for designing the RF matching network.

## RF Test Circuit

The manufacturer provides a dedicated 470 MHz test circuit rather than treating the transistor as an isolated three-terminal component. The circuit contains a combination of variable and fixed capacitors, RF chokes, inductors, and supply bypass components.

The published test circuit includes 0.8 pF capacitors at C1 and C2, an 18 pF chip capacitor at C3, 1000 pF capacitors at C6 and C8/C9, a 0.01 µF disc ceramic capacitor at C7, and a 10 µF, 35 V electrolytic capacitor at C10. The circuit also specifies a 0.47 µH molded choke for L1 and particular physical winding configurations for L2 and L3.

These details are technically significant because the SD1433 operates at 470 MHz, where PCB parasitics and component lead inductance can materially influence the RF circuit. The manufacturer test circuit therefore represents a complete RF implementation rather than merely a schematic illustration of transistor connectivity.

The specified board material is 3M-K6098 with a thickness of 1/16 inch. This further demonstrates that the RF performance is associated with a particular physical implementation. Reproducing the nominal transistor schematic without considering transmission-line and layout effects would not necessarily reproduce the published RF performance.

## Package and Pin Configuration

The SD1433 uses the M122 package, described by the datasheet as a 0.280-inch, four-lead stud-mounted package with an epoxy-sealed construction. The mechanical design is fundamentally different from conventional low-power through-hole or surface-mount transistor packages.

The transistor has four external connections. Pin 1 is the collector, pin 3 is the base, and pins 2 and 4 are emitter connections. The two emitter terminals are therefore part of the RF and current-handling structure rather than representing two independent transistor terminals.

The stud-mounted mechanical structure is relevant to thermal management because the transistor is intended for significant RF power dissipation. Mechanical attachment, electrical grounding, mounting inductance, and thermal coupling must therefore be considered together. The package is not merely a physical enclosure; its construction forms part of the intended high-power RF implementation.

## Thermal Characteristics

The datasheet specifies a junction-to-case thermal resistance, RTH(j-c), of 3.0 °C/W. This parameter describes the thermal resistance between the semiconductor junction and the defined case reference under the manufacturer's specified conditions.

At a power dissipation of 58 W, a simple thermal-resistance relationship would correspond to a substantial junction-to-case temperature rise. However, the 58 W value is an absolute maximum power-dissipation rating and should not be interpreted as a recommended continuous dissipation level under arbitrary mounting conditions. Actual allowable dissipation depends on case temperature, thermal interface conditions, mounting configuration, and the maximum permissible junction temperature.

The +200 °C maximum junction-temperature rating provides the semiconductor-level thermal boundary. For reliable RF operation, thermal design should therefore begin with the actual dissipated RF and DC power, establish the case-temperature condition, and then verify that the resulting junction temperature remains within the specified limit.

## Application-Level RF Considerations

The SD1433 is fundamentally a power-amplifier transistor rather than a general-purpose switching or linear transistor. Its Class C architecture, 450–512 MHz operating range, 12.5 V nominal RF operating condition, and 10 W minimum output specification collectively define its intended role as a UHF RF driver.

The specified gain of at least 7 dB means that approximately 2 W of RF drive is required to achieve the specified 10 W output under the manufacturer's 470 MHz test condition. The resulting RF output level is sufficiently high that matching-network losses, PCB losses, supply bypassing, transistor heating, and load-mismatch behavior become important design considerations.

The datasheet specifically states that the emitter-ballasted geometry is designed for stable power gain, maximum efficiency, and infinite VSWR. The latter description concerns the device's intended ruggedness against load mismatch, but it should not be interpreted as permission to disregard the RF matching network or thermal limitations. The transistor still has defined voltage, current, and power-dissipation limits.

## Overall Technical Assessment

The STMicroelectronics SD1433 is a legacy UHF RF power NPN transistor optimized for Class C driver operation around 470 MHz. Its key manufacturer specifications are a 450–512 MHz application range, 12.5 V RF operating condition, 10 W minimum output power at 2 W input power, minimum 7 dB power gain, and 60% stated efficiency. The device has a 16 V VCEO rating, 36 V VCBO and VCES ratings, 2.5 A maximum collector current, 58 W maximum power dissipation, and a +200 °C maximum junction temperature.

From an RF design perspective, the most important characteristics are the large-signal Class C operating mode, very low input impedance, defined collector load impedance, emitter-ballasted structure, and dedicated 470 MHz matching network. The M122 stud package and 3.0 °C/W junction-to-case thermal resistance also make mechanical mounting and thermal management integral parts of the design.

The datasheet identifies the SD1433 as an obsolete product. Therefore, the technical data remain useful for analysis, repair, legacy-equipment characterization, and reproduction of historical UHF RF designs, but the device should not be regarded as a current-production STMicroelectronics component. For any design using an existing SD1433, the RF matching conditions, voltage/current limits, thermal path, and original test-circuit topology should be treated as fundamental design constraints rather than optional implementation details.